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PIC10F200 microcontroller reference

Overview

Attribute Value
Program memory 256 words
Data memory 16 bytes
Stack size 2
Pin count 6 pins (4 I/O)
Peripherals 1 8-bit timer
Frequency 4MHz
      +--u--+
  -- -|1   8|- GP3
V'DD -|2   7|- GND
 GP2 -|3   6|- --
 GP1 -|4   5|- GP0
      +-----+

V'DD: Supply voltage
 GP2: GP2 / TMR0 input / F'OSC output
 GP1: GP1 / ICSP clock
 GP0: GP0 / ICSP data
 GND: Ground
 GP3: GP3 / ICSP power / ~MCLR

Power characteristics

Power characteristic Value
Supply voltage 2.0V to 5.5V
Operational current (no output load) 175μA @ 2V, 630μA @ 5V
Sleep current 0.1μA @ 2V, 0.35μA @ 5V

I/O pins

Pin Input? Output? Wake from sleep? Weak pullup?
GP0 Yes Yes Yes Yes
GP1 Yes Yes Yes Yes
GP2 Yes Yes No No
GP3 Yes No Yes Yes

Internal oscillator accuracy

The PIC10F200 has a single oscillator option, an internal oscillator with a nominal frequency of 4MHz. The mean frequency of the internal oscillator is 4MHz. Tolerances are:

A decoupling capacitor of 0.1μf or 0.01μf should be placed to bridge the power and ground wires as close to the microcontroller as possible, which will filter out voltage source noise and improve oscillator stability.

Program memory

The program counter is 9 bits, but only the lower 8-bits matter for the PIC10F200 due to the 256-word ROM size. The stack has two levels.

Data memory

Note: x means 'unknown state', - means 'not physically implemented'.

Addr Initial Name Description
0x00 xxxx xxxx INDF Indirect access to register stored in FSR
0x01 xxxx xxxx TMR0 8-bit real-time clock
0x02 1111 1111 PCL Program counter least-significant-byte
0x03 0--1 1xxx STATUS GPWUF, -, -, TO, PD, Z, DC, C
0x04 111x xxxx FSR Indirect data memory address pointer
0x05 1111 1110 OSCCAL CAL6, CAL5, CAL4, CAL3, CAL2, CAL1, CAL0, FOSC4
0x06 ---- xxxx GPIO -, -, -, -, GP3, GP2, GP1, GP0
07..0F ---- ---- -- Unimplemented
10..1F 0000 0000 -- General purpose registers
N/A ---- 1111 TRISGPIO -, -, -, -, GP3, GP2, GP1, GP0
N/A 1111 1111 OPTION GPWU, GPPU, T0CS, T0SE, PSA, PS2, PS1, PS0

STATUS register

Mnem. Name If value is 1... If value is 0...
GPWUF GPIO wake-up flag GPIO-wake-up occurred Other reset occurred
TO Time-out flag Power-up, CLRWDT, or SLEEP occurred Watchdog timeout occurred
PD Power-down flag Power-up or CLRWDT occurred SLEEP occurred
Z Zero flag Result of last math/logic operation was 0 Non-zero result
DC Digit carry flag
C Carry flag

OPTION register

Mnem. Name If value is 1... If value is 0...
GPWU GPIO wake-up enable Disabled Enabled for GP0/1/3
GPPU GPIO weak pull-up enable Disabled Enabled for GP0/1/3
T0CS Timer0 clock source select Use T0CKI pin input Use instruction cycle (OSC/4)
T0SE Timer0 source edge select Use T0CKI falling edge Use T0CKI rising edge
PSA Pre-scaler assignment Assigned to watchdog timer Assigned to Timer0
PS[2..0] Pre-scaler rate select See below See below

The following table describes the behaviour of the pre-scaler rate select bits. The TMR0 column applies if the pre-scaler has been assigned to Timer0, or WDT for the watchdog timer.

PS Value TMR0 WDT
000 1:2 1:1
001 1:4 1:2
010 1:8 1:4
011 1:16 1:8
100 1:32 1:16
101 1:64 1:32
110 1:128 1:64
111 1:256 1:128

OSCCAL register (oscillator calibration)

Used to configure the internal 4MHz oscillator. The 7-bit value spread over CAL6..CAL0 is a signed integer used to skew the frequency of the internal oscillator, as shown in the table below.

CAL6..0 value Skew value
01111111 +127 skew
00000001 +1 skew
00000000 +0 skew
11111111 -1 skew
10000000 -127 skew

FOSC4: Oscillator output enable

TRISGPIO register

Used to set the input/output mode for each GPIO pin. Register is write-only, reading from this register will read the input value of each pin instead.

Reset types

Power-on-reset

TODO.

Device reset timer

TODO.

Watchdog timer

TODO.

Timer 0 (TMR0)

TODO.

PIC10F200 programming reference

In Program/Verify mode, the program memory space encompasses:

Addr
0x0000..0x00FF User program memory
0x0100..0x0103 User ID locations (each 12-bits wide)
0x0104 Back-up OSCCAL value
0x0105..0x013F Reserved
0x0140..0x01FE Not physically implemented
0x01FF Configuration word

The 'User ID' locations are designed to hold identifiers to be read by external program verification tools.

The 'Back-up OSCCAL value' exists to make possible the reading of the oscillator callibration value even whilst code protection is enabled.

The Configuration Word register is physically located at 0x01FF, and is only available during Program mode entry. After the program counter has been incremented past this address the register will no longer be available, regardless of the value of the program counter. By convention, the configuration word is stored at logical address 0x0FFF in the ROM file, and it is the responsibility of the programmer software to translate this address over to the proper physical address during programming.

Methods for entering Program/Verify mode

The VPP-first method prevents the device from executing code prior to entering Program/Verify mode, as code execution is likely to prevent correct entry into Program/Verify mode.

The VDD-first method allows entry into Program/Verify mode without first needing to disconnect power from VDD.

To exit Program/Verify mode, drop voltage of ICSPPWR to operating voltage or lower.

Programming commands are 6-bits wide. Commands followed by data require a delay of 1μs ater the command, followed by 16 clock pulses to transmit the start bit, 14 data bits, and an end bit.

Commands and data are transmitted in little-endian, with the data pin latching on the falling edge of the clock. A hold period of 1μs with the data pin remaining unchanged is required on either side of the clock falling-edge.

A delay of 100μs is required after every 'End Programming' command.

The data values of the start and end bits are ignored.

During 'Read' commands, the ICSPDAT pin changes from input mode to output mode at the rising-edge of the 2nd data clock (the first data clock after the Start bit), and returns to input mode at the rising edge of the 16th data clock (the Stop bit).

Minimum of 100ns delay between data change and clock falling-edge, and between clock falling-edge and next data change.

Commands

Note: Command bits are denoted here in little-endian, which is the order in which they are to be transmitted.

Name Command Data
Load Data for Program Memory 0 1 0 0 x x Yes (14)
Read Data from Program Memory 0 0 1 0 x x Yes (14)
Increment Address 0 1 1 0 x x No
Begin Program 0 0 0 1 x x No
End Program 0 1 1 1 x x No
Bulk Erase Program Memory 1 0 0 1 x x No

Note TODO: Load, then Begin, then 2ms, then End, then Incr., then rinse+repeat.

The 'Write Progam' command loads a 12-bit value into the current memory word. The two most significant bits of the data word are ignored.

The 'Read Program' command outputs the value of the current memory word.

The 'Bulk Erase Program' command fills the program memory, the oscillator callibration instruction (at 0x00FF), and the configuration word (at 0x01FF) with all 1's, taking 10ms.

End Program terminates the programming process. A delay of 100μs is required before issuing the next command in order to allow the programming voltage to dissipate.

Instruction set

33 instructions, 12-bits wide.

Mnem. Old Word Description Status
ADDw ADDWF,0 0001 110f ffff W=W+f C/DC/Z
ADDf ADDWF,1 0001 111f ffff f=W+f C/DC/Z
ANDw ANDWF,0 0001 010f ffff W=W&f Z
ANDf ANDWF,1 0001 011f ffff f=W&f Z
ANDk ANDLW 1110 kkkk kkkk W=W&k Z
BCLR BCF 0100 bbbf ffff f[b]=0 --
BSET BSF 0101 bbbf ffff f[b]=1 --
BSKP0 BTFSC 0110 bbbf ffff Jump 1 if f[b]==0 --
BSKP1 BTFSS 0111 bbbf ffff Jump 1 if f[b]==1 --
CALL CALL 1001 kkkk kkkk --
CLRw CLRW 0000 0100 0000 W=0 Z=1
CLRf CLRF 0000 011f ffff f=0 Z=1
CLRWDT CLRWDT 0000 0000 0100 WDT=0 TO/PD
DECw DECF,0 0000 110f ffff W=f-1 Z
DECf DECF,1 0000 111f ffff f=f-1 Z
DECZw DECFSZ,0 0010 110f ffff W=f-1, jump 1 if 0 --
DECZf DECFSZ,1 0010 111f ffff f=f-1, jump 1 if 0 --
EORw XORWF,0 0001 100f ffff W=W^f Z
EORf XORWF,1 0001 100f ffff f=W^f Z
EORk XORLW 1111 kkkk kkkk W=W^k Z
GOTO GOTO 101k kkkk kkkk --
NOP NOP 0000 0000 0000 -- --
NOTw COMF,0 0010 010f ffff W=~f Z
NOTf COMF,1 0010 011f ffff f=~f Z
INCw INCF,0 0010 100f ffff W=f+1 Z
INCf INCF,1 0010 101f ffff f=f+1 Z
INCZw INCFSZ,0 0011 110f ffff W=f+1, jump 1 if 0 --
INCZf INCFSZ,1 0011 111f ffff f=f+1, jump 1 if 0 --
IORw IORWF,0 0001 000f ffff W=f-OR-W Z
IORf IORWF,1 0001 001f ffff f=f-OR-W Z
IORk IORLW 1101 kkkk kkkk W=W-OR-k Z
ROLw RLF,0 0011 010f ffff C
ROLf RLF,1 0011 011f ffff C
RORw RRF,0 0011 000f ffff C
RORf RRF,1 0011 001f ffff C
SETw MOVF,0 0010 000f ffff W=f Z
SETf MOVWF 0000 001f ffff f=W --
SETk MOVLW 1100 kkkk kkkk W=k --
SUBw SUBWF,0 0000 100f ffff W=f-W C/DC/Z
SUBf SUBWF,1 0000 101f ffff f=f-W C/DC/Z
SWPw SWAPF,0 0011 100f ffff W=f[3..0,7..4] --
SWPf SWAPF,1 0011 101f ffff f=f[3..0,7..4] --
TESTf MOVF,1 0010 001f ffff Z=f==0 Z
OPTIONf OPTION 0000 0000 0010 OPTION=W --
RETk RETLW 1000 kkkk kkkk Return, W=k --
SLEEP SLEEP 0000 0000 0011 Enter standby mode TO/PD
TRISf TRIS 0000 0000 0fff f=W (f=6,7) --

Test program for PIC10F200

Preamble

%ADDw:f    [ 0001 110f ffff ]
%ADDf:f    [ 0001 111f ffff ]
%ANDw:f    [ 0001 010f ffff ]
%ANDf:f    [ 0001 011f ffff ]
%ANDk:k    [ 1110 kkkk kkkk ]
%BCLR:f:b  [ 0100 bbbf ffff ]
%BSET:f:b  [ 0101 bbbf ffff ]
%BSKP0:f:b [ 0110 bbbf ffff ]
%BSKP1:f:b [ 0111 bbbf ffff ]
%CALL:k    [ 1001 kkkk kkkk ]
%CLRw      [ 0000 0100 0000 ]
%CLRf:f    [ 0000 011f ffff ]
%CLRWDT    [ 0000 0000 0100 ]
%DECw:f    [ 0000 110f ffff ]
%DECf:f    [ 0000 111f ffff ]
%DECZw:f   [ 0010 110f ffff ]
%DECZf:f   [ 0010 111f ffff ]
%EORw:f    [ 0001 100f ffff ]
%EORf:f    [ 0001 100f ffff ]
%EORk:k    [ 1111 kkkk kkkk ]
%GOTO:k    [ 101k kkkk kkkk ]
%NOP       [ 0000 0000 0000 ]
%NOTw:f    [ 0010 010f ffff ]
%NOTf:f    [ 0010 011f ffff ]
%INCw:f    [ 0010 100f ffff ]
%INCf:f    [ 0010 101f ffff ]
%INCZw:f   [ 0011 110f ffff ]
%INCZf:f   [ 0011 111f ffff ]
%IORw:f    [ 0001 000f ffff ]
%IORf:f    [ 0001 001f ffff ]
%IORk:k    [ 1101 kkkk kkkk ]
%ROLw:f    [ 0011 010f ffff ]
%ROLf:f    [ 0011 011f ffff ]
%RORw:f    [ 0011 000f ffff ]
%RORf:f    [ 0011 001f ffff ]
%SETw:f    [ 0010 000f ffff ]
%SETf:f    [ 0000 001f ffff ]
%SETk:f    [ 1100 kkkk kkkk ]
%SUBw:f    [ 0000 100f ffff ]
%SUBf:f    [ 0000 101f ffff ]
%SWPw:f    [ 0011 100f ffff ]
%SWPf:f    [ 0011 101f ffff ]
%TESTf:f   [ 0010 001f ffff ]
%OPTIONf   [ 0000 0000 0010 ]
%RETk:k    [ 1000 kkkk kkkk ]
%SLEEP     [ 0000 0000 0011 ]
%TRISf:f   [ 0000 0000 0fff ]

Blinker Program

TODO